About the team:

Mobileye develops purpose-built hardware and AI technologies that power advanced driver-assistance and autonomous-driving solutions. Our EyeQ™ SoCs and imaging radar technologies are designed to deliver scalable, automotive-grade performance and help enable safer mobility worldwide.
Join our advanced packaging team and take ownership of package-substrate layout for cutting-edge digital and RF products. You will collaborate with silicon, package, SI/PI, PCB, manufacturing, and OSAT teams to deliver high-quality, manufacturable package layouts that meet demanding automotive requirements

What will your job look like:

Own IC package-substrate layout from feasibility through manufacturing release.
Perform die placement, bump fan-out, ball-map planning, package-size estimation, and layer planning.
Set up stack-ups, padstacks, design rules, and layout constraints.
Implement high-density bump-to-ball routing for signal, power, and ground nets.
Route high-speed and RF interfaces according to defined SI/PI constraints.
Perform DRC, connectivity, LVS/netlist, and DFM checks.
Generate artwork, fabrication drawings, reports, and release documentation.
Resolve layout-related queries from substrate manufacturers and OSATs.

Mobileye changes the way we drive, from preventing accidents to semi and fully autonomous vehicles. If you are an excellent, bright, hands-on person with a passion to make a difference come to lead the revolution!

B.Sc. in Electrical Engineering or a related field, or equivalent practical experience. 5+ years of hands-on IC package-substrate layout experience. Strong proficiency with Cadence Allegro Package Designer. Experience with flip-chip BGA, bump fan-out, ball-map optimization, and multilayer substrate routing. Experience working from schematics, netlists, design rules, and constraint documents. Good understanding of high-speed layout principles, including differential pairs, length matching, spacing, and return paths. Good understanding of power-delivery and power-integrity layout principles, including power and ground plane design, current-carrying requirements, and via-array implementation. Experience with DRC, connectivity verification, DFM, and manufacturing-data release. Strong attention to detail and the ability to independently own designs through release. Nice to have: Experience with RF, SiP, multi-die, interposer, or 2.5D package layouts. Experience with DDR, PCIe, SerDes, MIPI, or UFS interfaces. Experience with Siemens Xpedition Package Designer or CAM350. Experience working directly with substrate manufacturers and OSATs. Experience with scripting for package-layout automation.