A technology and engineering company specializing in E/E products and solutions for the automotive market.
Our company is the automotive industry’s first Cybertech Tier supplier empowering OEMs, Tier 1 suppliers, and the aftermarket to deliver the next generation of software-defined and service-oriented vehicles. Our flexible and scalable solutions enable added connectivity, Zonal E/E Architecture, hosted applications, high-speed routing, vehicle personalization, and security.

Job Responsibilities:
– Lead design, RTL coding, simulation, and testing work in alignment with external standards and the company's internal procedures.
– Lead a small HW team providing both personal and professional leadership.
– Receive architecture specs/block definitions from the architects.
– Allocate tasks/blocks the RTL designers.
– Follow up on the RTL work/designers.
– Support the RTL design work.
– Schedule setting and managing.
– Risk mitigation and issue-solving management.
– Documenting and implementing FPGA designs from concept to mass production.

• At least 7 years of experience with FPGA/ASIC development - a must. • Experience in designing complex designs including coding, verification synthesis, and integration of 3rd party IPs - a must. • Experience with VHDL/Verilog - a must. • Experience with synchronous and high-performance pipeline architecture - a must. • Experience with Xilinx/ALTERA/Lattice FPGA architecture - a must. • Experience with Ethernet, Networking, and Microprocessors – an advantage.